Among the semiconductor memory devices, a memory card such as an SD memory card (registered trademark) and a compact flash (registered trademark) has a feature of being small in size. The memory card is in practical use as a removable memory device of portable equipments such as a digital still camera utilizing the small-sized feature.
The memory card being in practical use has therein a nonvolatile memory (flash memory) and a controller LSI serving as a control circuit thereof. Recently, needs for large-capacity and fast writing on the memory card are increasing. Thus, the memory card is subjected to the following improvement: a nonvolatile memory of a plurality of chips is contained therein and a nonvolatile memory and a controller LSI are connected to each other via a plurality of memory buses, e.g., two memory buses, so that a write operation is performed in parallel. JP-A 06-119128 (1994) discloses one example of the above technique.
However, in the conventional semiconductor memory device, simply changing the mounting number of nonvolatile memories to be comprised in the memory card is not sufficient for actualizing various capacity of memory card of, for example, 256 MB or 512 MB. In other words, there arises a need for switching an address managing process of an internal part of the controller LSI in accordance with the mounting number of nonvolatile memories. Thus, there arise disadvantages that the internal process becomes complicating and that the cost of the controller LSI increases by introducing such mechanism.
In order to solve the above disadvantages, the present invention aims to achieve a controller LSI (hereinafter, simply referred to as a controller) that can be controlled in the same process even in the case of changing the number of nonvolatile memories to be comprised. That is, the present invention aims to accomplish enhancement in versatility of the controller and, as a result, lower the cost of the semiconductor memory device. Specifically, the present invention is based on controlling two nonvolatile memories (flash memories) (four in total) through two buses, respectively. Further, the present invention aims to actualize controller that simplifies an address managing process of the controller, thereby commonly controlling one nonvolatile memory (two in total) through two buses, respectively.